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Merge pull request #265 from modelscope/dev

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support height width checker
This commit is contained in:
Zhongjie Duan
2024-11-13 12:39:56 +08:00
committed by GitHub
parent e7c41151ec e17ad83fb5
commit 095e8a3de8
10 changed files with 20 additions and 0 deletions
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2
diffsynth/pipelines/cog_video.py
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@@ -77,6 +77,8 @@ class CogVideoPipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}

2
diffsynth/pipelines/flux_image.py
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@@ -156,6 +156,8 @@ class FluxImagePipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}

2
diffsynth/pipelines/hunyuan_image.py
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@@ -230,6 +230,8 @@ class HunyuanDiTImagePipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Prepare scheduler
self.scheduler.set_timesteps(num_inference_steps, denoising_strength)

2
diffsynth/pipelines/omnigen_image.py
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@@ -215,6 +215,8 @@ class OmnigenImagePipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}

2
diffsynth/pipelines/sd3_image.py
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@@ -92,6 +92,8 @@ class SD3ImagePipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}

2
diffsynth/pipelines/sd_image.py
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@@ -112,6 +112,8 @@ class SDImagePipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}

2
diffsynth/pipelines/sd_video.py
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@@ -170,6 +170,8 @@ class SDVideoPipeline(SDImagePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters, batch size ...
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}
other_kwargs = {

2
diffsynth/pipelines/sdxl_image.py
View File

@@ -135,6 +135,8 @@ class SDXLImagePipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}

2
diffsynth/pipelines/sdxl_video.py
View File

@@ -124,6 +124,8 @@ class SDXLVideoPipeline(SDXLImagePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Tiler parameters, batch size ...
tiler_kwargs = {"tiled": tiled, "tile_size": tile_size, "tile_stride": tile_stride}

2
diffsynth/pipelines/svd_video.py
View File

@@ -130,6 +130,8 @@ class SVDVideoPipeline(BasePipeline):
progress_bar_cmd=tqdm,
progress_bar_st=None,
):
height, width = self.check_resize_height_width(height, width)
# Prepare scheduler
self.scheduler.set_timesteps(num_inference_steps, denoising_strength=denoising_strength)