5 Commits

Author	SHA1	Message	Date
Qifan Zhang	5c89a15b9a	Reorder optimizer and logger calls in training loop (#1404)	2026-04-21 13:45:09 +08:00
Hong Zhang	4ec4d9c20a	Merge pull request #1354 from mi804/low_vram_training_ds ... low vram training with deepspeed zero3	2026-03-17 16:09:52 +08:00
feng0w0	4e9db263b0	[feature]:Add adaptation of all models to zero3	2026-01-27 11:24:43 +08:00
Artiprocher	d13f533f42	support auto detact lora target modules	2026-01-21 11:05:05 +08:00
root	72af7122b3	DiffSynth-Studio 2.0 major update	2025-12-04 16:33:07 +08:00